PSPL5544 Datasheet

PSPL5544 100 V Bias Tee Datasheet
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The PSPL5544 is an ultra-broadband, high-current, coaxial bias insertion tee and DC blocking capacitor. The high DC blocking voltage (100 V) and high bias current capability (2 A) make it an excellent choice for broadband measurements of power devices and circuits.

Key performance specifications
  • 50 kHz to 40 GHz
  • 8 ps rise time
  • 100 V, 2 A

Typical performance

The following figures show the linear sweep from 40 MHz to 50 GHz. The AC connector is the input (port 1) and the AC + DC connector is the output (port 2).

The following figure shows the S21 insertion loss.


The following figure shows the S11 return loss.


The following figure shows the S22 return loss.



Parameter Symbol Units Minimum 1 Typical Maximum 1 Comments
Impedance Z ohms   50     
Upper 3 dB frequency fc,h GHz 40       
Lower 3 dB frequency fc,l kHz   50     
Rise time tr ps     10 – 90%
Insertion loss S21 dB   See plot Measured with open on DC port.
Input (AC), Return Loss S11 dB 10  See plot    
Output (AC+DC), Return Loss S22 dB See plot    
DC voltage V V     100   
DC current I A      
Capacitance C μF   0.2     
Inductance L μH   100     
Resistance R ohms   0.5     
CW RF power P W     10   
Isolation S13 dB   > 35    f > 100 MHz
DC path bandwidth fc,DC kHz   42     
RF connectors 2.92 mm jacks (f)
Warranty One year

1*Maximum and minimum values are based on manufacturing test limits at 25 °C.


Mechanical dimensions

Last Modified: 2016-07-28 05:00:00

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