Memory Compliance Analyzer
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The Memory Compliance Analyzer (MCA) is a new class of instrument that combines real-time visibility of the occurrence of the events on the bus with post processing capability of the memory bus protocol.
Key performance specifications
- Complete memory standard support for DDR3, DDR3L, and DDR4 memory standards up to 2400MT/s including custom speed grades not defined in the JEDEC specification.
- Unmatched test coverage with over 1400 real-time checks performed and reported for a typical dual rank system. Sets of timing parameters can be defined and customized with Boolean and arithmetic equations.
- Comprehensive trigger capability with the ability to create multi-state triggers (up to 8 states) to trigger and capture complex events using any combination of violations: 4 word recognizers, 2 counters, 1 global qualifier, 1 trigger in.
- Deep acquisition memory; 1 G samples of qualified deep acquisition storage allows capture of bus activity leading up to and/or following the events of interest.
- Automates protocol compliance and performance statistics.
- Perform debug/analysis across the self-refresh or power down cycles when clock signal is inactive.
- Operate as a real-time protocol analyzer or a triggered state analyzer or both simultaneously, enabling real-time analysis over long periods to identify the events of interest and capture data around the region of the occurrence.
- Visualize eye diagrams, assess bus signal integrity with iCiS™ (I see eyes) and programmable front-end enable DDR PHY level debug.
- DDR3 and DDR4, component, slot, and midbus probing solutions provide the ability to target the MCA for different form factors/applications, preserving analog characteristics.
- Use a family of over 20 interposer probes to preserve analog signal characteristics; compatible with the Tektronix TLA7000 series logic analyzers.
- Reuse the probes/interposers between the MCA and the Tektronix logic analyzer.
- Drill down from violation listing to state or waveform views based on single timestamp.
- Perform concurrent analysis on multiple instruments with a single probe to get analog, high-speed timing, state and real-time protocol views on the same data through a single probe.
- Take snapshots of the contents of the real-time event storage and export post capture data in XML format for importing into other third party analysis tools.
- Scripting based real-time reporting and charting for on-system analysis
- Tektronix provides a broad range of tools for electrical validation, logic validation, and execution validation.
- Multi-acquisition control enables long analysis runs and capture of highly intermittent violations.
- Integrated PC controller enables Windows Remote Desktop access or stand-alone operation.
JEDEC Protocol compliance analysis
The MCA4000 and MCA3000 Memory Compliance Analyzer analyzes across 2 channels and 8 ranks for thousands of compliance violation checks. Analysis continues across self-refresh cycles and power down entry/exit. It includes auto-precharge analysis.
Multiple standard or custom timing parameter setups enable speed grading and quickly switch between standard or custom speed grades for margin analysis. It provides HTML reporting/XML exporting with customization support.
Automated analysis session features
The following automated analysis features are included:
- Selectable session types
- Protocol analysis session - The protocol analyzer runs until stopped reporting violations and statistics.
- Single acquisition session - The protocol analyzer runs until the state analyzer is triggered.
- Multi-acquisition session - Results are stored, analysis is restarted; selectable iterations.
- iCiS session - "Sampling Scope" illustration of signal characteristics and eye diagrams.
- JEDEC standard reference time sets that can be copied and modified.
- Ability to enable one, some, or all real-time parameter categories.
- Independent trigger state machine with 8 if/else/or logic states, 4 word recognizers, 2 counters and multi-condition global storage qualifier.
Fully programmable front-end enables high-speed iCiS eye diagramming.
The compliance navigator screen updates in real-time and displays current status of compliance parameters with min/max values, specification values, pass/fail results, and percentage margin indicators.
Statistics windows display parameters and counters at system, rank, bank group, and bank level. The statistics can be snap-shot exported without disturbing or disrupting real-time analysis.
Single timescale for violations and state acquisitions
Violations are highlighted in the state display. Scroll the acquisition buffer to see what led up to the violation. Timing and state windows stay in sync.
Large family of 20+ Ultra-fidelity slot and component interposers preserve analog waveform characteristics and are compatible with the MCA and the TLA; single probe loading enables concurrent usage.
Probes available for use with the MCA and TLA
The NEX-PRB1XL HCD probe, if used with the interposers, provides one copy of signals allowing the interposer to be used either with the MCA or with the TLA. Alternately use of the P6960HCD probe provides two copies of the signals with only a single load on the target allowing both the MCA and the TLA to be used at the same time as shown. The MCA can also be used with the standard P6900 series of probes making it suitable for mid-bus applications.
Simultaneous probing with the MCA and TLA using a single probe